Dear all,
I would like some feedback on a issue i have.
In GC memory model given by devkitpro examples, the CPU can access its RAM by a cacheable way at address 0x80000000 but also by a non-cacheable way at address 0xC0000000.
For this ,i am OK.
But if a program executes load and store 32bit word ...
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- Sun Dec 11, 2011 5:22 pm
- Forum: devkitPPC
- Topic: 8 or 16 bit access in non-cacheable GC RAM
- Replies: 0
- Views: 4883